1. Field of the Invention
This invention relates to the field of analog circuits, and, in particular, to continuous-time filters.
2. Background Art
Integrated circuit continuous-time filters have gained significant importance and industrial acceptance, particularly for applications in the megahertz frequency range. The major drawback of this type of filter is that the pole frequency is inversely proportional to an RC (or g.sub.m /C) time constant, which is subject to large uncontrollable absolute component variations. Consequently, a post fabrication adjustment of the pole frequency to the nominal design value by means of trimming or tuning is generally required.
A high frequency continuous-time integrated circuit filter is comprised of a number of filter sections. These filter sections are, in effect, "RC" circuits in which the resistance (R) and the capacitance (C) of the filter element affect the timing accuracy of the filter itself. In the prior art, these filters have been constructed of discrete elements where each element has an accuracy within a desired range. When implementing a filter in an integrated circuit, however, variations in resistance and capacitance can occur. Thus, the accuracy of an integrated circuit filter varies with the R and C of the integrated circuit, or when transconductance is used, the gm and C. It is desired to compensate for these variations to provide an accurate, predictable, stable filter.
Two distinctly different approaches can be identified in adjusting the pole frequency of a monolithic continuous-time filter: a one-time trim during wafer probe (or final test) and an on-chip tuning loop which adjusts the cutoff (-3 dB) frequency, f.sub.c, either continuously or periodically upon user command.
In the trim method, the pole frequency is adjusted only once, usually at wafer probe, and careful circuit design is required to guarantee minimal variations from the target cutoff frequency, f.sub.c, over temperature and supply voltage as well as over the cutoff frequency range in the case of a programmable filter. The advantages of this method are its simplicity and the absence of interference from a reference and on-chip tuning circuitry. The disadvantage is that it requires being able to measure f.sub.c. Accurately measuring a filter's pole frequency in the megahertz range on a production tester (ATE) is extremely difficult. Unshielded wires of up to a few inches in length between the part and the tester result in significant noise coupling, feedthrough and additional attenuation.
In U.S. Pat. No. 5,063,309, Yamasaki proposes the addition of a separate oscillator circuit to the continuous-time filter IC. The oscillation frequency (f.sub.osc) of the oscillator is designed to track the filter's cutoff frequency, f.sub.c. Both filter and oscillator are connected to a common adjustable bias circuit. FIG. 1 shows a diagram of a circuit illustrating the principle of Yamasaki.
In FIG. 1, a bandgap reference 100 provides a stable voltage to the base of transistor Q104. The emitter of transistor Q104 is coupled to a grounded external resistor Rx. The bandgap reference voltage, the base-emitter voltage of transistor Q104, and the resistance of external resistor Rx determine the collector current of transistor Q104 that is provided to the programmable current source 101, here shown as a digital-to-analog converter (DAC). Based upon digital inputs, DAC 101 outputs a current equivalent to the collector current of transistor Q104 multiplied by a programmable constant. DAC 101 provides the output current to the collector of transistor Q105.
The collector and base of transistor Q105 are coupled together. The emitter of transistor Q105 is coupled through trimmable resistor R1 to ground. The base of Q105 is also coupled to the bases of transistors Q106 and Q107. The emitters of transistors Q106 and Q107 are coupled to grounded resistors R2 and R3, respectively. Transistors Q106 and Q107 act as current mirrors in conjunction with transistor Q105. The collector current in transistor Q106 is approximately R1/R2 times the collector current of transistor Q105. The collector currents of transistors Q106 and Q107 are provided as bias currents to filter block 102 and oscillator block 103, respectively. The circuit could also be done without the bandgap reference at the loss of some temperature stability. Also, the circuit could be constructed with MOS instead of bipolar devices.
Trimming resistor R1 increases or decreases the bias currents supplied to the filter and oscillator by equivalent amounts. These changes in the bias currents are reflected in equivalent changes in the cutoff frequency of filter 102 and the oscillation frequency of oscillator 103. Since measuring f.sub.osc involves taking a single frequency reading rather than a magnitude measurement, it can be easily accomplished using ATE. Based on the f.sub.osc measurement, f.sub.osc and simultaneously f.sub.c are adjusted to their desired valued, i.e. the common bias circuit is adjusted. The adjustment is made by zener zap, fuse blowing, or laser trimming in the case of a thin film resistor of resistor R1. R1 could also be a diffused or poly resistor. After the initial trim, the oscillator is disabled. With trimming accomplished at wafer probe, the oscillator would typically not be wire-bonded out to pins in the final package. Therefore, the actual trim procedure is completely transparent to the end user. There is no power nor potential feedthrough penalty. The disadvantage of this method is wasted silicon area for the oscillator which is used only once for a very short time period. Also, less confidence is gained than would be the case if the filter itself were tuned rather than the oscillator since one relies on matching.
In other prior art filters, a filter's accuracy is established by trimming an external resistor. Such a filter is described in "Single-Chip Y/C Signal-Processing LSI for 8 mm VCR System," Yamaguchi et al., IEEE BCTM, 1987.
The on-chip tuning method which is most commonly reported and which is being used in some commercially available IC's is the master-slave approach. FIG. 2 illustrates an on-chip tuning approach. A reference clock 208 provides reference signal 203 to f.sub.c control circuit 202, as well as master block 200 if the master circuit is a filter. The master filter/oscillator output 204 is provided to control circuit 202 for comparison with reference signal 203. Control circuit 202 supplies bias signal 205 to master filter/oscillator 200 and slave filter 201. Slave filter 201 receives input 206 and provides filtered output 207 continuously.
In further detail, an oscillator or filter (the "master" 200) which closely matches the actual signal processing filter (the "slave" 201) is placed inside a control loop (e.g. PLL) and its f.sub.osc or f.sub.c is locked to an accurate external reference frequency 208. An error correction signal is generated that is also provided to the slave or used to adjust a common bias circuit. When the master loop is in lock, the f.sub.c of the slave filter is corrected to its desired value. The master-slave approach avoids the need for an initial f.sub.c measurement. Also, since tuning is continuous, it can also account for drift due to temperature, supply voltage and aging. However, there is a significant area and power overhead for the master filter/oscillator and control circuitry, and a stable external reference must be available. There is also the potential for significant feedthrough from the master control loop to the slave, resulting in increased noise and distortion.
Such prior art filters are described in "Gyrator Video Filter IC with Automatic Tuning," Moulding, K. W. et al., IEEE JSCC, Vol. SC-15 No. 6, December 1980, and "Design and Performance of a Fully Integrated Bipolar 10.7 MHz Analog Bandpass Filter," Chii-Fa Chiou, and Rolf Schaumann, IEEE JSCC, Vol. SC-21, February 1986. Other references including this approach are Design of Analog Filters: Passive, Active RC, and Switched-Capacitor, by R. Schaumann, M. S. Ghausi, and K. R. Laker, published by Prentice Hall in New Jersey, 1990; and "Continuous-Time MOSFET-C Filters in VLSI," Y. Tsividis, M. Banu, and J. Khoury, also in IEEE JSSC, Vol. SC-21, February 1986.
A major drawback for both methods described above is that in neither case is the filter itself measured and/or adjusted directly. Rather, one relies upon matching between an additional filter or oscillator and the actual filter of interest. A variation of the master-slave approach, described by Tsividis in "Self-Tuned Filters," in Electronic Letters, volume 17, no. 12, pp. 406-407, published in June 1981, envisions a complete duplication of the slave filter. While one of the filters is being tuned in the loop, the other one is processing signals and its control voltages and/or currents are being held constant. Periodically the filters are interchanged. By tuning the actual filter itself in this way, one would expect better performance (i.e. f.sub.c accuracy). However, this approach requires a complete duplication in hardware of the filter circuit and further circuitry for switching between the filters and storing the bias values. The circuit takes up more die area, uses more power and must be carefully designed to reduce the effects of transients introduced by the switching circuit.